Generally, in solid state imaging devices, a two-dimensional electrical charge pattern is generated at an image area by an incident light image, the amount of charge accumulated at each picture point (pixel) of the image area being proportional to the light intensity at that point. After a fixed period of charge integration, the accumulated charge is read-out, pixel by pixel, into a video amplifier to give a time sequential analogue signal which is representative of the viewed scene.
There are several different types of solid state imaging device available such as, for example, charge transfer devices with frame transfer or interline transfer architectures, or X-Y addressed charge injection or MOS array types. The present invention is relevant to all such types of device.
Modern photolithographic manufacturing equipments used for the fabrication of solid state imaging devices are of the "wafer stepper" type. These employ step and repeat technique to produce an array of patterns on a wafer substrate. The image field of a stepper is imaged onto a small area of the wafer and the wafer then moved and re-exposed. This process is repeated successively until the whole wafer has been covered with an array of patterns.
A disadvantage of the wafer stepper technique compared to the "whole wafer" aligners previously used, is that the size of the largest device that can be fabricated is limited by the optical field size of the wafer stepper. For many applications, such as astronomy and X-ray imaging, there is a need for larger devices than can be fabricated on currently available wafer steppers.